1. Field of the Invention
The present invention relates to an apparatus and method for sorting burn-in tested packaged chips, and more particularly to an apparatus and method for sorting burn-in tested packaged chips, with a DC test unit and an unloading buffer movable to heads.
2. Description of the Background Art
At the conclusion of a packaging process, packaged chips are put through a series of environmental, electrical, and reliability tests. These tests vary in type and specifications, depending on the customer and use of the packaged chips. The tests may be performed on all of the packaged chips in a lot or on selected samples. The environmental test such as temperature cycling is performed to weed out leaking and defective packages. The packaged chips are loaded into a chamber and cycled between two temperature extremes. The electrical test includes a series of parametric test checking the general performance of the packaged chips, and a functional test exercising the specific chips functioning. An apparatus for sorting burn-in tested chips performs the DC characteristic test on the packaged chips which are intended for burn-in test, and sorts burn-in tested packaged chips on a basis of grade assigned according to a result of burn-in test.
The packaged chips are moved by a head, in the apparatus for sorting packaged chips. Pickers, provided to the head, picks up and release the packaged chips.
FIG. 1 is a plane view illustrating a schematic configuration of a conventional apparatus for sorting burn-in tested packaged chips, which was disclosed in the Korean laid-open publication No 2000-65749.
As shown in FIG. 1, a loading unit 3, where a tray containing packaged chips stays, is provided on one side region of a main body 1 of the apparatus for sorting burn-in tested packaged chips. An unloading unit 4, where a tray stays to contain burn-in test-passed packaged chips, is provided on the opposite side region of the main body 1.
A sorting unit 5, where trays stay to contain burn-in test-failed packaged chips according to their grades, is provided in the front between the loading unit 3 and the unloading unit 4. A rack 2, from which a burn-in board containing burn-in tested packaged chips is supplied, is provided beside the main body 1. A table 20 is provided inside the main body 1. The table 20 takes out the burn-in board ‘B’ from the rack 2 and brings it inside the main body 1. The table 20 returns the burn-in board ‘B’ to the rack 2. A DC test unit 8 is provided adjacent to the loading unit 3. An unloading buffer 10 is provided adjacent to the unloading unit 4.
A main X-axis frame 6 is provided on the main body 1, crossing over the DC test unit 8, the burn-in board ‘B’, and the unloading buffer 10. A loading head 11, an inserting head 12, a removing head 13, and an unloading head 14 are provided on the main X-axis frame 6. The loading head 11 transfers the packaged chips from the loading unit 3 to the DC test unit 8. The inserting head 12 transfers the packaged chips from the DC test unit 8 to the burn-in board ‘B’. The removing head 13 transfers the packaged chips from the burn-in board ‘B’ to the unloading buffer 10. The unloading head 14 transfers the packaged chips from the unloading buffer 10 to the unloading unit 4.
A sorting head 15, which transfers burn-in test-failed packaged chips staying on the DC test unit 8 and the unloading buffer 10 to the sorting unit 5 along an X-Y axis 7, is provided over the sorting unit 5. A tray-transferring unit 18 is movably provided on an X-axis frame 19 which is positioned in the rear of the loading unit 3 and the unloading unit 4. The tray transferring unit 18, which transfers an empty tray from the loading unit 3 to the unloading unit 4 along the X-axis frame 19, is provided in the rear of the loading unit 3 and the unloading unit 4.
Operation of the apparatus for sorting burn-in tested packaged chips is now described.
When the apparatus for sorting burn-in tested packaged chips operates, a hook (not shown), provided to the table 20, pulls out one burn-in board ‘B from the rack 2 and transfers it to a working area, located at the center of the main body 1. Subsequently, the tray is transferred in the rear from the loading unit 3, to be positioned under the main X-axis 6. The loading head 11 picks up the packaged chips from the loading unit 3 to transfer it to the DC test unit 8. The DC test unit 8 performs a DC test on the packaged chips. The inserting head 12 and the removing head 13 are simultaneously moved over the DC test unit 8 and the burn-in board ‘B’, respectively, after finishing the DC test. The inserting head 12 picks up the DC tested packaged chips from the DC test unit 8, and the removing head 13 picks up the burn-in tested packaged chips from the burn-in board ‘B’.
Thereafter, the inserting head 12 and the removing head 13 are moved on the left to put the DC tested packaged chips and the burn-in tested packaged chips on the burn-in board ‘B’ and the unloading buffer 10, respectively. Subsequently, the inserting head 12 and the removing head 13 are moved back to be positioned over the DC test unit 8 and the burn-in board, respectively. Thereafter, the burn-in test-passed packaged chips on the unloading buffer 10 are loaded onto the tray ‘T’ staying at the unloading unit 4. The sorting head 15 is moved along the X-Y frame 7 toward the unloading buffer 10 to load the burn-in test-failed packaged chips placed on the unloading buffer 10 onto the tray ‘T’ in the sorting unit 5.
The burn-in board ‘B’ staying on the table 20 returns to its original position, after the burn-in tested packaged chips are removed from the burn-in board ‘B’ and new DC tested packaged chips are then inserted into the burn-in board ‘B’.
However, the DC test unit 8 is fixed to the main body 1 of the conventional apparatus for sorting burn-in tested packaged chips. So, the inserting head is required to wait to pick up DC test-passed packaged chips from the DC test, until the loading head releases packaged chips intended for DC test on the DC test unit and then goes away from the DC test unit. This increases the time for preparing for DC test.